In the current art of electronic circuits, integrated circuits or micro-circuits are fabricated in such a manner that thin semiconductor slices having a multiplicity of individual matrices or micro-circuits are formed. In the usual practice in the art, the slices contain multiple identical repeating matrices of the same type of micro-circuit or integrated circuit unit. The individual unit is sometimes referred to as an integrated circuit chip.
The present practice is to test each of the circuits of each integrated circuit chip formed on the semiconductor wafer prior to separating the wafer into the desired individual integrated circuit components. In some instances, the individual integrated circuit unit may contain multiple circuits, and it is therefore desirable to test each of the circuits of the integrated circuit unit before the wafer is cut into individual integrated circuit units.
Since each micro-circuit of each wafer is normally in a predetermined precise relationship with respect to the adjacent circuit units, it is possible to test the circuitry if a probe can be accurately located on each preselected point corresponding to the circuit to be tested. It is possible, for example, to test several different circuits at the same time, or the same circuit of several different integrated circuit units. Thus, it is possible that adjacent probe arms may be positioned relatively closely to each other, in which event any capacitive coupling between adjacent probes should be avoided in order to obtain reliable test data.
Obviously, the positioning of the probes must be quite accurate and adjustable such that different integrated circuit units may be tested. Once the probes have been properly oriented, the wafer may be stepped from position to position so that each micro-circuit is properly located relative to the cooperative probe units for appropriate testing.
One of the difficulties which has occurred in prior art devices is the accurate positioning of the probe such that meaningful test data may be obtained. For example, if the predetermined position of the probe varies during the test of any specific wafer which includes a multiple of circuit units, the probe may not contact the proper circuit point resulting in a "reject". In fact, the particular component being tested may be quite operative, and the reject signal is generated simply because of improper contact between the test probe and circuit under analysis. Similarly capacitive effects may adversely affect the reliability of the data.
Accordingly, it is desirable to provide an assembly for testing integrated circuit components in which the assembly includes a test probe asembly made up of a housing and a test probe, the probe assembly being adjustable in a controlled accurate manner such that the probe tip may be oriented precisely in a predetermined position.
The orientation in a predetermined position may be defined as a precise location referenced by XY coordinates, and a vertical position defined by a Z coordinate. Since the wafer is generally planar, the proper vertical position if the probes used in testing must be closely controlled in order to obtain uniform contact pressure between each probe tip and each circuit.
After the predetermined position of the test probe has been established, it is desirable to provide some way of maintaining the test probe assembly in the proper orientation such that the test probe will not vary from its preselected position from one test to another in a particular series.
It is also desirable to be able to provide for rapid accurate adjustment of the test probe position as may be needed when different types of wafers are being tested in which there are differences in the circuits of one wafer to the next wafer.
Another desirable objective is to provide a probe arm assembly in which possible capacitive coupling between adjacent probes is substantially reduced or eliminated thereby enabling close positioning of the probes, or if in spaced relation, being assured that there is little, if any, capacitive coupling.